OCP EMEA Summit 2026 — Session Guide

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Hear from OCP Foundation staff as we kick off the Summit!

We are in the middle of an intelligence revolution anchored by a diverse set of increasingly sophisticated high-performance chips and systems. Delivering an optimized system level solution requires a fungible and agile data center design that can adapt to the needs of each type and generation of chip (e.g., TPU, GPU, etc). In this session, we will unveil Google’s blueprint for the fungible data center for the AI era embodied in the OCP Open Data Center specification. We will discuss innovations including Project Deschutes liquid cooling, Mt Diablo power delivery, and peek into upcoming technologies like Solid State Transformers and Battery Energy Storage Systems. Finally, we will share Google’s latest advancements across the systems stack (e.g., AI hardware, security, storage, networking, etc) that delivers compute efficiency, reliability, and sustainability. Collaborative efforts and industry-wide alignment are essential to realize this exciting future.

Future compute roadmaps are now clear—and they point to an unprecedented leap in rack density. Designs exceeding 500 kW per rack are no longer theoretical; they are rapidly becoming a core requirement for next‑generation AI factories. This shift introduces a new paradigm in power architecture, challenging us to rethink how we deliver safe, reliable, efficient, and sustainable compute at extreme scale. To support this evolution, data centers must adopt direct current (DC) power strategies and re-evaluate every link in the power chain. In this session, we will unpack: • The key technical considerations for high‑density, high‑power rack design • The critical elements of DC power delivery needed to support these loads • The architecture paths and technology options that enable sustainable, resilient AI facilities aligned with emerging use

The rise of AI and Digital tech has become the hottest topic in Data Centres. AI, is revolutionising computing and is transforming data centres and cloud services. Data Centre builds in Europe will triple by 2030 with a huge impact on energy provision and cooling systems. We will need new breakthroughs in energy provision, delivery and cooling high perfomance computing. How can companies, customers, societies, and governments navigate these dynamics? This presentation will investigate the impact AI will have on Data centres and how compute can evolve to meet these challenges

The rapid evolution of AI demands scalable, efficient infrastructure that bridges the gap between regional providers and emerging hyperscalers. This interactive discussion panel, inspired by the newly launched "Scaling AI Clusters at Neoclouds" workstream under the Open Compute Project's Future Technologies Initiative, brings together leaders from diverse neocloud organizations—companies offering xPU infrastructure as a service—to share insights on overcoming key hurdles in AI deployment. Panelists will discuss strategies for sourcing facilities, power, and hardware; fostering interoperability across scales; enhancing energy efficiency; and developing open standards to reduce vendor lock-in and accelerate growth. Drawing from real-world experiences in building AI factories, from small-edge deployments to massive operations, the session will explore how community-driven collaboration within OCP can drive modular, cost-effective solutions. Attendees will gain actionable perspectives on hybrid models for AI training and inference, global energy sourcing, and the role of OCP initiatives like Open Systems for AI in shaping the future of sustainable AI scaling.

The first wave of AI infrastructure was defined by hyperscale training: massive, tightly coupled systems optimized for a few frontier models and operated by organizations with extraordinary resources. As AI adoption accelerates, the center of gravity is shifting toward inference for the masses—serving billions of users, trillions of queries, and a growing diversity of models and environments. Inference at scale has fundamentally different requirements. Cost efficiency, energy proportionality, latency predictability, and operational flexibility often matter more than peak performance. This shift demands open, modular, and composable infrastructure. Open standards and interoperable systems reduce lock-in, enable rapid innovation, and allow platforms to be right-sized—moving AI from training by a few to scalable intelligence for the many.

As Europe scales toward a sovereign, AI‑driven digital future, Microsoft is advancing open, secure, and sustainable infrastructure built on Open Compute Project standards. In this keynote, we’ll show how Azure’s sovereign cloud architecture, including the EU Data Boundary, is reinforced by open hardware security and firmware foundations across Caliptra, OCP SAFE, and Confidential Computing to deliver verifiable, silicon‑rooted trust and consistent lifecycle control at hyperscale. We’ll also preview upcoming OCP contributions focused on hardware partitioning, isolation, and fleet‑level efficiency to improve utilization, manageability, and flexibility for AI platforms, informed by real‑world deployments such as Maia 200 and Fairwater. We’ll also highlight how sustainability is being engineered directly into the stack, demonstrating how open specifications translate regulatory, performance, and environmental requirements into production‑ready AI infrastructure.

Scaling agentic AI requires an open, OCP-aligned heterogeneous infrastructure that combines inference-optimized GPUs with CPUs offering large memory capacity and bandwidth to deliver sustainable, high-efficiency performance across data center, telco, and edge environments. As token volumes surge and AI pipelines diversify, homogeneous GPU-centric architectures become too costly and rigid, reinforcing the value of disaggregated, standards-based systems aligned with OCP principles such as modularity, openness, and vendor choice. Ease of deployment is essential for operators and enterprises to adopt AI platforms that fit naturally into open racks, Ethernet-based scale-out networks, and existing operational models while improving energy efficiency and lowering TCO. This approach supports telco networks, distributed enterprise inference, and edge systems constrained by power, cooling, and space, providing a sustainable, future-ready path for large-scale agentic AI.

As AI models continue to grow in complexity, both training and inference are growing rapidly in operational importance. These AI workloads continue to push the limits of compute density and interconnect scale. Meeting these demands requires a next-generation networking fabric that can: • Scale up within and across a small number of racks to tightly couple XPUs for high-throughput training and low-latency inference • Scale out across entire data centers using flat, high-performance topologies that support large-scale training and high-fanout inference workloads • Scale across geographically distributed data centers, enabling unified AI fabrics that support million-plus-XPU training and inference environments. We will discuss these scaling vectors and the latest Ethernet advancements democratizing large-scale deployments including key OCP initiatives—Ethernet Scale-Up Networking (ESUN), Scale-Up Ethernet Transport (SUE-T), and Open Cluster Design for AI.

Artificial Intelligence is transforming data center design, driving extreme rack densities and making advanced power distribution and liquid cooling essential for scalable, high‑performance compute. Traditional infrastructure cannot support AI workloads exceeding 500 kW per rack or their highly dynamic electrical and thermal loads. This keynote introduces next‑generation, liquid‑ready racks, OCP‑aligned architectures, high‑capacity DC power distribution, and advanced Direct Liquid Cooling (DLC) solutions designed for these demands. A complete OCP‑based blueprint—integrating DC power, DLC cooling loops, and OCP rack engineering—shows how open standards and industrialized design accelerate the deployment of AI‑ready infrastructure across Enterprise, Colo, and Hyperscale environments.

This keynote panel will present the progress of the OCP Data Center Facility sub-project focusing on Low Voltage Direct Current (LVDC) Power Distribution. Experts will detail the necessary industry transformation, practical barriers to adoption, and the path forward to implementing Direct Current power solutions required to meet escalating modern IT demands.

AI infrastructure faces a critical, defining constraint: power. Growth will be dictated by performance per watt and the ability to deploy sustainably. At Meta, we are addressing this challenge through a multi-pronged approach, including the adoption of Power-Efficient CPUs and driving LPDDR memory integration in the datacenter. These power and sustainability constraints are now universal. Join us to learn new approaches to reduce energy costs, improve performance/watt, expand supply options, and accelerate deployment through deep open hardware collaboration. The keynote will share views on community collaboration—particularly through OCP—for building interoperable hardware and software building blocks.

AI is accelerating the shift toward modular, open data center architectures built for scale, efficiency, and rapid innovation. In this keynote, Arm will highlight new Arm-based silicon and system designs that address the growing demands of AI and cloud workloads through system-level co-design with premier hyperscale partners. Arm will share how its contributions to the Open Compute Project are helping shape the foundational building blocks of open infrastructure, spanning silicon, chiplets, system architecture, firmware, and security. Through active leadership in initiatives such as the Foundation Chiplet System Architecture (FCSA), Arm is working with the ecosystem to enable interoperable, modular platforms that reduce fragmentation and accelerate adoption across data center environments. The keynote will also spotlight the continued momentum of Arm Total Design and ATD- aligned chiplet ecosystems, demonstrating how open collaboration across the supply chain is accelerating time to market. Together with the OCP community, Arm will outline a clear path toward AI infrastructure that is more scalable, sustainable, and built in the open.

Media Analyst Lunch

Apple, Carrot, Raisin, Pine Nut & Spinach Salad VG/GF/DF/Contains nuts Bulgur Salad with Tomato, Olive & Minced Vegetables in Olive Oil VG/DF Selection of Breads & Butter Assorted Sauces & Vinaigrettes Braised Caribbean Chicken GF/DF Salmon Supreme with Confit Fennel, Potato & Mango Sauce GF/Contains shellfish Farfalle with Ratatouille (Eggplant, Tomato, Zucchini & Peppers) VG/DF Roasted Rosemary Potato Wedges VG/GF/DF Sautéed Cabbage & Shiitake Mushrooms with Crispy Kale & Creamy Carrots VG/GF/DF Fresh Seasonal Fruit Salad with Natural Syrup VG/GF/DF Almond & Apricot Financier with Chocolate Quenelle V/Contains nuts Creamy Oreo V

Power Lunch

In this session, ODCA chair of the board Hartwig Stammberger, shows how industry‑proven direct current (DC) power architectures increase efficiency and reduce resource use in next‑generation AI data centers. Drawing on large‑scale DC deployments in industry, we show realized benefits such as lower energy losses and reduced copper needs. 800 V DC power distribution offers a scalable, standardized approach for future data centers. The Open Direct Current Alliance (ODCA) shares its latest achievements in harmonization, standardization, and contributions to OCP’s white‑paper efforts to accelerate open, interoperable DC ecosystems. Sponsored by Open Direct Current Alliance (ODCA)

• Current Caliptra Status • Discuss state of Caliptra and how integration efforts are moving forward • Progress on 2.1 Enablement • RTL, ROM, FW Status • Trademark Process Update • How an integrator can get the Caliptra Trademark (OCP SAFE Auditor) • Caliptra 2.2 Features and Timeline • USB 2.0 • Size Reduction • Etc. • Progress on Community Feedback at OCP Global • Jeff will talk about OCP Lock Updates • Invitation to integrate

Combining the AI analog world of opinions with the digital rules of sensors to predict where you can safely increase loads, release stranded capacity and adjust cooling for energy savings.

Welcome & Kickoff: Adoption, Ecosystem Growth, and the Path to Participation

This session will provide role of Open Platform Firmware (OPF) in the IT system management and updates to the  Platform Firmware (OPF) project activities. This will include high level Open Silicon Firmware Interface (openSFI) and Unified Platform Configuration (UPC) workstreams updates; and other proposed workstreams under consideration.

Join us for the Future Technologies Symposium and hear from the Chair, Jon Summers, in this session.

The rapid rise of AI has driven backend clusters from tens to hundreds of thousands of GPUs, creating unique needs versus traditional data centers: ultra-low latency, high throughput, and proactive fault detection. This demands advanced traffic engineering and telemetry. This talk presents Microsoft's next-generation AI backend network architecture, detailing deployed features such as Segment Routing over IPv6 (SRv6), High-Frequency Streaming Telemetry (HFST), and trimming—their implementations and motivations. We’ll also assess SAI and SONiC readiness for hyper-scale AI backend network deployment.

The data center industry is undergoing one of the most significant architectural and operational transformations in its history. Driven by exponential growth in AI workloads, the rising complexity of hyperscale infrastructure, and intensifying sustainability expectations, organizations are reevaluating the fundamental design principles that have shaped server and data center engineering for decades. Three forces are emerging as the defining vectors of this new era: the shift toward rackscale designs and the management challenges they introduce; the expanding role of opensource innovation in firmware and hardware enablement; and sustainability-driven practices that are reshaping how data centers are built, powered, and optimized. Together, these trends represent not just incremental modernization, but a reset of how digital infrastructure is conceived, orchestrated, and governed.

OCP S.O.L.I.D. is a new workstream that standardizes security requirements for datacenter components. It sets a common bar that vendors can integrate into their development processes from the beginning. The first version is already public, but in this talk we will officially announce it widely for the first time.

Over time, the priorities of the Open Compute Project Community’s focus on servers and rack systems have evolved from improving interoperability, integration, and energy efficiency, to preparing server platforms and datacenters for the growing demands of AI workloads; this includes a strong focus on sustainable growth. Worldwide use of OCP-recognized infrastructure continues to increase thanks to a rapidly expanding OCP vendor ecosystem and the way hardware designs are openly shared and available to any organization that wants to access and implement them. Over the next few years, IDC expects total spending on OCP-recognized infrastructure to outpace total market expenditure across several key segments.

FTS Keynote from Jaume Salom, IREC – Catalonia Institute for Energy Reseach

Since the release of the openSFI v0.3 specification, the community has made meaningful forward progress in refining the architectural direction of a vendor-agnostic silicon firmware interface. Through focused technical collaboration, openSFI contributors have iterated toward a clearer, stage-based boot flow that defines how host firmware and silicon initialization firmware interact while preserving vendor implementation flexibility. This session will discuss the motivation behind these iterations, the collaborative process used to align on a common boot flow, and how this work informs the ongoing evolution toward v0.5. The presentation will focus on architectural principles, agreed-upon flow concepts, and open areas for continued collaboration, rather than detailed specification content.

CRA compliance does not have to mean fragmented assessments and increased cost. By leveraging existing OCP Safe evaluations and aligning them with SESIP security assurance, organizations can streamline their approach to regulatory compliance. This executive session outlines how a combined evaluation model supports CRA security objectives while maintaining alignment with market expectations and OCP principles. Attendees will learn how this strategy enables faster market access, clearer security claims, and improved confidence for customers, regulators, and ecosystem partners.

OCP L.O.C.K. is an umbrella effort to strengthen security for data center storage devices. In this talk we will provide an update on OCP L.O.C.K.'s implementation, as well as the current state of companion specifications being defined in Trusted Computing Group's Storage Workgroup.

Broadcom is a corporation with about twenty-five thousand employees and twenty-three semiconductor and infrastructure software divisions. The company modernized its data-center and campus networking by replacing a legacy three-tier, vendor-locked stack with a disaggregated CLOS architecture running the open-network operating system SONiC and an open Ethernet ecosystem. The initiative began in early 2019 and progressed through a phased rollout from 2020 to 2026. Early work revealed interoperability and operational challenges across diverse hardware and software. Addressing these required organizational changes, new automation and telemetry, and closer hardware–software–operations collaboration. In this presentation, Broadcom architects describe how they validated SONiC and implemented a tenant-based architecture to isolate workloads and they share their lessons learned. The production environment now includes over ten thousand SONiC switches across multiple regions, supporting both data-center and campus use cases. Outcomes include reduced vendor lock-in, faster feature delivery, improved quality and a lower total cost of ownership.

FTS Keynote presented by Cerabyte

Firmwares have a strong legacy, their management is also critical to maintain system security. Between a push for higher sovereignty and adaptability needs which are exploding due to a wider range of ISA architecture that CSP have to support, we will cover during this exciting panel the state of firmware, and discuss with European industry leaders about their specific needs to sustain their growth.

The total risk of ownership (TRO) of AI Factories is a new outgrowth of the TCO work.  While TCO evaluates the financial costs of ownership, TRO considers the risks of all types with owning and operating infrastructure at scale.  These risks can be categorized and assessed using multi-industry standards such as ISO 31000 family of standards and practices to offer baseline risk tolerances for designs, builds and operations.

As AI clusters expand into the thousands of GPUs, traditional networking has become a primary bottleneck for performance. This session introduces a paradigm shift: scale-up and scale-out switching. We will explore how 100Tb-class fabric architectures eliminate the complexity of multi-stage networks, providing the massive bandwidth and ultra-low latency required for next-generation AI workloads. Learn how simplifying your network fabric can maximize GPU utilization and future-proof your AI infrastructure.

Come hear from our Global Summit winner, UniSCool, and be there for the big reveal of our EMEA Summit $10,000 prize winner!

Fault injection and side-channel protections are already standard for payment terminals, automotive HSMs, game consoles, and IoT secure elements. Now they're first-class requirements for datacenter hardware. OCP SOLID requirement ROT001 mandates that Roots of Trust implement protections against both attack classes. OCP SAFE Scope 3 defines how these threats should be evaluated, focusing on practical attacks and supply-chain risks rather than theoretical extremes.  This session explains why these requirements exist and what they mean for hardware vendors. We'll cover the threat models driving SOLID's ROT001 requirement, how SAFE Scope 3 balances security rigor with practical evaluation costs, and why the framework uses JIL scoring instead of CVSS for physical attacks.

Modern data center and fabric designs increasingly adopt BGP as the sole routing protocol to improve scalability and operational stability. However, this approach abstracts the underlying link and topology information, limiting the ability of controllers and automation systems to obtain a detailed network view comparable to traditional link-state protocols. In this session, we present the design and implementation of BGP Link-State (BGP-LS) for BGP fabrics in FRR and its integration into SONiC. We will walk through the architectural choices, implementation challenges, and interoperability considerations involved in enabling routers to advertise topology information without relying on a traditional IGP. The session will also cover the upstreaming of the BGP-LS implementation in FRR and the integration in SONiC: - https://github.com/FRRouting/frr/pull/20470 - https://github.com/FRRouting/frr/pull/20726

Attendees will learn how modern AI and HPC datacenters can operate as fast, controllable, grid-responsive loads using existing, open, vendor-neutral management standards. The session will walk through a real engineering demonstration showing how external grid dispatch signals can be translated into deterministic GPU power modulation at millisecond timescales without hardware modification or proprietary interfaces.  Participants will gain insight into the end-to-end control loop, from dispatch signal ingestion and orchestration to GPU power modulation and acknowledgment back to the grid, while enforcing the operational constraints required to maintain thermal and electrical thresholds and preserve Service Level Agreement (SLA) commitments. The talk will also explore how this capability enables AI infrastructure to participate in curtailment and demand response programs, easing grid congestion and supporting scalable AI deployment.

Follow-up to our OCP presentation "Server HW Security Hub”, this work defines HW managed Key distribution Protocol with KMTx/KMRx endpoints. HW blocks connect via a serial point‑to‑point bus and an optional shared bus, within an SoC or across UCIe die‑to‑die. At power‑on the serial bus provisions a Bus Encryption Key (BEK); at run time Data Encryption Keys (DEKs) are sent on demand, encrypted under BEK, over serial or shared bus. A platform security hub anchored to Caliptra initiates transactions; optional secondary hubs relay for clock/CDC crossings to endpoints (DDR, MACsec, PCIe/CXL, accelerators). KDP defines per‑endpoint ordering, credit/debit flow control, tagged responses/ACKs, set/get-check-values and zeroize for BEK/DEK, and boundary tags (SoC/package/external) for locality policy. KDP is transport/topology agnostic. Message formats and SoC/SiP topologies are presented.

Platform configuration remains one of the most fragmented and vendor-specific areas of system firmware. The Unified Platform Configuration Interface(UPCI) is an OCP initiative designed to shift platform configuration from a code-driven to a data-driven model enabling openness, interoperability and scalable system integration. In this joint update from AMI and Insyde on behalf of the Open Platform Firmware workstream, they present the latest progress of the specification and share key architectural concepts behind human-readable and machine-readable configuration representations. The session will outline how UPCI supports silicon initialization, host firmware, inter-firmware communication and platform lifecycle management across diverse hardware and firmware environments. Attendees will gain insight into how UPCI simplifies platform customization, reduces ecosystem fragmentation and lays the foundation for multi-vendor collaboration and richer configuration tooling in the OCP community.

Join Albane, Scaleway’s COO, and Yann-Guirec, Office of the CTO & co-chair of Scaling AI Clusters at Neocloud, for an insightful session on leveraging MHS, OpenRackv3, and facility design papers to slash costs and speed up deployments. Discover how collaborative strategies and open solutions future-proof hardware deployments by standardizing components and promoting interoperability, enhancing energy efficiency through optimized facility designs and cutting-edge cooling techniques, and spur sustainable innovation in the neocloud industry by minimizing e-waste and encouraging community-driven progress. Learn how these approaches can significantly reduce time-to-market, a vital factor for AI projects, and redefine infrastructure deployment for AI and cloud environments, ultimately lowering development costs, improving energy efficiency, and seamlessly integrating software and hardware in deployments.

The majority of data centers still rely on air cooling, despite rising CPU/GPU thermal design power (TDP) exceeding limits and the prohibitive cost of retrofitting for water cooling. Operators are seeking ways to extend air cooling lifespan and reduce water consumption.  Valeo, leveraging its automotive thermal expertise, is expanding into data center cooling and has partnered with Calyos, a specialist in advanced two-phase heat transport, to introduce a new passive Two-Phase air-cooled server solution.  This pump-free architecture requires no facility-side water infrastructure. It's designed to boost server performance while keeping air cooling as the primary interface.  Key benefits outlined in the paper include higher CPU/GPU thermal headroom, reduced fan power and noise, lower electricity consumption, and enhanced reliability.  The paper will detail operating principles, use cases, and industrial pathways for scaling to serial production for both retrofits and new server designs.

This presentation discusses operational experience deploying EVPN multi-site VXLAN fabrics on SONiC across heterogeneous underlay networks. The session examines how EVPN Border Gateway architectures interconnect IPv4/IPv6 WAN and data center fabrics, and the practical challenges that emerge when applying these designs in an open networking environment. The focus is on control-plane resiliency and failure-domain isolation, highlighting how dual-loopback architectures and deliberate underlay routing choices help maintain EVPN stability during isolation events, preventing MAC churn and preserving host reachability. EVPN multi-homing behavior in SONiC is explored, including DF/NDF election, local-bias BUM forwarding, and mechanisms required to avoid L2 loops while supporting both single-homed and dual-homed endpoints. Rather than presenting a reference architecture, the session emphasizes real-world constraints, implementation gaps, and trade-offs encountered during development. The presentation concludes with practical considerations for operators building scalable and resilient VXLAN/IP fabrics using SONiC, and identifies areas for continued collaboration within the OCP community.

Standardizing server management is critical for the success of the Arm-based server. Arm has collaborated with ecosystem partners in and out of OCP developing the technologies based on industry standards. This session provides the details of the work that Arm ecosystem has done so far and also a plan to formalize a mechanism to continue the future development officially inside OCP. We will explain why we think that is the best approach.

Side-channel attacks remain a critical threat to practical post-quantum cryptography (PQC), targeting implementation artifacts rather than algorithmic weaknesses. Classical masking techniques protect against such attacks but incur significant area, latency, and complexity overheads. This presentation introduces the new version of Adam’s Bridge, a hardware accelerator for lattice-based PQC, implementing architectural-level masking that leverages the additive linearity of the NTT and INTT. Secret shares are processed independently through transform stages, isolating data paths and inherently masking intermediate operations such as multiplication, addition, and modular reduction. This approach strengthens security while reducing area and performance overhead, providing more secure ML-KEM and ML-DSA operations. Adam’s Bridge demonstrates a scalable, industry-grade solution for efficient, secure PQC acceleration on modern open hardware platforms.

AI chip power density has made Direct Liquid Cooling (DLC) to cold plates a necessity, not an option. Primary and secondary closed loops in the white space, typically using 25% MPG, must deliver reliable 24/7 performance while supporting rising rack densities and future chip evolution. The real challenge is designing infrastructure that is both resilient and future-proof. DLC piping is mission-critical: it must prevent air ingress, maintain coolant purity, enable redundancy and maintenance, and ensure maximum operational security. Material selection is crucial—dissimilar metals risk electrolytic corrosion, while glycol blends affect heat transfer and pressure drop. Optimized designs limit pressure losses to filters and cold plates, use low fluid velocities to allow density growth, and favor prefabricated welded spools over threaded joints to minimize leak risk.  Join GF presentation from Mark Bulmer, GF the expert in high performance piping systems.

Be sure to visit the FTS poster displays in the hall during the afternoon break! Posters have been authored by each speaking session, as well as by the following additional companies: AlumaPower, Meta, Nlevel & Cibao Cloud Technologies- Inc., YPlasma

AI-driven datacenters are rapidly transforming power architecture. Rack densities have scaled from tens to hundreds of kilowatts, fundamentally changing how power is distributed and converted. This session introduces OmniOn Power’s entry into the AI datacenter market and explores the transition from traditional AC distribution to 54V intermediate bus and high-voltage DC approaches. As AI workloads introduce dynamic, unpredictable load behavior, efficiency must be evaluated across the full operating range, not just at peak. This presentation examines how evolving power requirements are redefining internal power system design and why load-optimized performance is critical for next-generation AI infrastructure.

Remote Attestation is fundamental for establishing trustworthiness of an End Point (ex:Data Centre Server). When appraising a complex entity such as Server with Multiple Root of Trusts such as a CPU and GPU/NPU/ NIC cards, one need to know: • How to construct Composite Evidence? • How supply chain actors coordinate to provide a unified view of the Golden Measurements for Composite Attester required by Verifiers, using Concise Reference Integrity Manifest (CoRIM) been discussed in OCP security WG. • Multiple Attestation Verifiers may need to coordinate to produce Attestation Verification of such systems. • How attestation results to a Relying Party Reflect the composite nature of Evidence, and • How Relying Parties are supposed to make sense of that complexity. The presentation will highlight the IETF RATS Based Standards work done by teams from Arm, Intel, NVIDIA, AMD etc to address the complexity  & development work in Open Source Project Veraison to handle such complex scenarios.

Today's rapidly evolving global regulatory landscape is impacting products with digital elements including embedded systems and firmware. New cybersecurity requirements—spanning the EU Cyber Resilience Act, IEC 62443‑4‑2, and similar global frameworks—are raising expectations for secure development, vulnerability handling, and transparent software supply chains. These shifts are reshaping how organizations and technologies approach lifecycle‑long security and compliance. As these rules expand, open-source firmware, such as openBMC and edk2 will need to align with emerging obligations to remain viable in regulated commercial environments. This presentation highlights how both communities and adopters can meet new expectations through stronger development practices, improved vulnerability response, and clearer documentation, outlining the path toward secure and compliant open‑source firmware.

Canopy BMC is an upstream-first OpenBMC distribution designed for openness, maintainability, and enterprise-grade stability. In collaboration with HPE, we bring the ProLiant Gen11 platform into the OpenBMC community while aligning with Open Compute Project (OCP) goals. This talk explores our integration strategy, covering hardware enablement, system modeling, and how we ensure code quality and maintainability across diverse platforms. We will share how the same upstream-first approach extends to OCP servers such as Tioga Pass and Yosemite (Delta Pass), contributing to a unified, reusable OpenBMC ecosystem. Attendees will gain insight into practical collaboration patterns, upstream contribution workflows, and how community-driven development can scale across vendors and hardware generations.

• Datacenter-Scale Optical AI Inference: Demonstrating a Deployable Optical Server for Billion-Parameter-Scale LLMs by Phillip Burr • Enhancing AI Data Center Efficiency: OCP OFP8 Lossless Compression for LLM Inference by Nilesh Shah • Market Inefficiency in GPU Infrastructure: The Case for Workload-Specific Performance Transparency by Ash Chary and Andrew Nelson • How to Increase Tokens per Watt by 30 percent by Taner Dosluoglu • Cable-Free Physical Layers for Rack-Scale AI Systems: System-Level Validation of Short-Range Wireless Interconnects by Timour Paltachev Konstatine Tiutin

SONiC's roots are in hyperscale data centers, but its rapid adoption and maturing ecosystem have made it a viable option for enterprises seeking open, disaggregated networking. Whether you're debugging an AI training job where GPU-to-GPU fabric performance is critical, or operating a traditional enterprise data center, getting layer 1, the physical layer right is fundamental to everything above it. This session provides a comprehensive guide to understanding, configuring, and debugging the physical layer in SONiC. It highlights the ongoing community work to improve the operator experience. We will demonstrate tools that many legacy NOS platforms lack or charge extra for. For link health, we cover FEC histograms, preFEC BER, and Frame Loss Ratio metrics. For transceiver diagnostics, we explore sfputil commands for raw EEPROM access and show interface transceiver status to expose CMIS register flags and alarms. Combined with DOM data, operators gain deeper visibility into link health than most proprietary alternatives offer. We conclude with real-world case studies from Nexthop's production troubleshooting experience, and discuss improvements that are in the roadmap.

Presentation will be focused around the latest on multi-core fiber (MCF) development. Intro: What is multi-core fiber and how does it work What problems does MCF fiber solve (e.g. rack level fiber congestion issues) Solution: Illustrate latest on MCF products, and illustrations reduction in congestion/space saving within racks and pathways. Timing: When it will be required for scale up/scale out segments of the data center due to congestions within rack.

Across hyperscalers, ~50% of deployments are already Arm-based, delivering leading performance-per-watt and strong benchmark results. Because of this scale, even small tuning changes translate into meaningful sustainability gains and lower TCO. Using an FCSA-standardized interface shared with the OCP community, plus firmware-mediated controls, enables datacenter-wide optimization of power, performance, and thermal behavior for Arm systems. To improve subsystem energy efficiency via power capping coordinated by system management firmware, we should integrate with rack-level management such as AMI Data Center Manager (DCM), then extend the capability across racks, rows, and whole datacenters. Likewise, thermal management—including closed-loop liquid cooling—can be implemented using thermal and bulk telemetry protocols, with PID-based control adjusting CPU and platform operating points to keep silicon within the cooling budget while maximizing performance and energy efficiency.

As silicon Root of Trust becomes essential for secure computing, the Caliptra open-source project offers a vendor-neutral implementation backed by the trademark audit process. But what does this audit actually look like in practice?  This session shares insights from the first Caliptra Trademark Audit processes: preparing RTL, ROM, and firmware documentation for laboratory review; interpreting SHOULD requirements and crafting defensible justifications; and navigating the integration path from standalone IP block to fully certified SoC.   We'll demystify the roles of manufacturers, OCP SAFE SRPs, and the Trademark Audit Committee. Attendees will learn what evidence evaluators expect, how to anticipate common documentation gaps, and realistic timelines for the process. Whether you're evaluating Caliptra adoption or preparing for your own audit, this session provides the practical roadmap for this process.

This panel traces the journey of the Universal Quick-Disconnect (UQD) specification from early concept to ecosystem adoption, focusing on how a market-ready standard emerged in a space where quick disconnects are both highly complex and operationally critical. By standardizing on baseline requirements and interfaces, the UQD aims to provide predictable quality and performance, while preserving space for differentiation and future innovation.  Unpack the tradeoffs between performance, form factor and interoperability that shaped the spec, and how collaboration across QD vendors, integrators, and end users turned competing requirements into a unifying standard. Panelists will discuss how learnings from first deployments informed the roadmap for future revisions, ensuring the spec can keep pace with rising rack densities, new cooling architectures, and the next wave of innovation in quick disconnect technology.

AI clusters are deploying Top-of-Rack (ToR) and interconnect switches for scale-up and scale-out connectivity. SONiC is emerging as a strong NOS candidate for these switches making manageability and observability much easier. However, SONiC needs to be enhanced and modified to make it a uniform choice for scale-up and scale-out switches. On one hand, SONiC needs to be lean and mean for these deployment scenarios. Many standard SONiC features are not required for scale-up networking and can be pruned for better resource usage. Additional features can be added to SONiC to help with fine-grained congestion control and superfast telemetry. On the other hand, SONiC needs to integrate with manageability requirements of open standards of scale-up and scale-out namely ESUN, UAL, UEC, etc. It also needs to support OCP's Open Rack Management Framework (extended for switches). This will position SONiC as a unique NOS for AI Data centres tailored for AI workload and compatible with new standards.

Attendees will learn how low-voltage (LV) power distribution architecture influences the scaling of material use and associated lifecycle emissions in large AI data centers. The presentation introduces a cradle-to-site lifecycle assessment comparing conventional copper-based LV systems with high-current superconducting distribution, focusing on how copper mass and concrete duct bank requirements scale with routing distance and delivered capacity. Attendees will see that, in conventional architectures, these material dependencies lead to emissions that increase strongly with distance, while superconducting architectures substantially reduce copper intensity and significantly reduce concrete requirements, resulting in lifecycle impacts that vary more weakly with scale. The session provides a systems-level framework for evaluating LV distribution as an architectural design choice that shapes how sustainability metrics evolve as AI data center campuses expand.

Combining Bazel with SONiC brings faster, reproducible, and more secure builds to the SONiC Foundation ecosystem — making SONiC easier to develop, integrate, and operate at cloud scale. For more background on our speaking proposal, please refer to our recently published technical blog at https://blog.aspect.build/bazel-for-sonic This session presents a summary and coding examples of adopting Bazel — Google's open-source build system — for SONiC, demonstrating how modern build infrastructure can transform developer productivity, security, and release engineering. -- The Legacy Build Problem: How SONiC's Makefile-based system (317+ rules with arbitrary commands) created brittleness, non-reproducibility, and maintenance challenges at scale -- Hermetic Package Resolution: technical insights into solving Debian package dependency overlays, RPATH management, and cross-compilation challenges -- Radical Reproducibility: How explicit dependency management eliminates ""works on my machine"" failures and decouples builds from host OS dependencies -- Python at Scale: Leveraging Aspect Rules Python with UV for deterministic, cross-compilable Python dependency management. -- And more.

This presentation highlights collaborative efforts within the open system firmware project to improve platform quality through expanded code‑coverage practices in EDK2. By enhancing the openly developed UnitTestFrameworkPkg and creating additional community‑maintained test libraries to increase the breadth and depth of firmware validation. These improvements enable more rigorous measurement of untested execution paths across silicon, board, and platform code. The resulting insights help reduce regressions and strengthen reliability. As coverage metrics scale to the platform level, the open system firmware ecosystem benefits from transparent, reproducible, and community‑driven testing methods—advancing the overall robustness and maintainability of open firmware.

OpenPRoT has advanced significantly in developing a portable, open-source Platform Root of Trust firmware stack. This talk showcases admissible platform security architectures built on OCP technologies, including OpenPRoT and Caliptra. We'll introduce a specification for a standardized PRoT module connector, enabling interchangeability of PRoT modules from multiple vendors on a single DC-SCM board. We'll demonstrate OpenPRoT's dual-configuration approach: • Endpoint RoT: Streamlined build for embedded RoT applications with self-management capabilities • Orchestrator RoT: Expanded build for Platform RoT/Rack Manager deployments, orchestrating boot, updates, recovery, and attestation for multiple devices

AI compute has continued to scale by orders of magnitude, delivering better frontier models. Training clusters now span hundreds of thousands of GPUs and desire to reach 1 million+. Scale-up domains want to grow from 72 GPUs to larger, higher-bandwidth domains with a single tier of switches. If these levels of scale can be achieved, new MoE models with trillions of parameters, more experts, and more active experts per token are possible - delivering greater intelligence. Yet switch silicon has advanced only incrementally, doubling radix and capacity every 2–2.5 years, creating a “network wall” stifling these ambitions. We will introduce Eridu and a new class of switch silicon and system, delivering a step function increase in radix and throughput to breakthrough this network wall and unlock the next era of AI infrastructure. We will discuss how a high-radix switch can enable larger, more capable AI models while improving GPU utilization, power efficiency, and cluster economics.

Everything You Always Wanted to Know About Liquid Cooling but Were Afraid to Ask!  This one hour interactive townhouse session invites attendees to ask any question they have about liquid cooling, whether technical, strategic, or operational. Volunteer leaders from across the OCP Cooling Environment Sub-projects will engage directly with the audience to address fundamentals, advanced topics, and real world challenges faced in adoption. The session creates an open and constructive environment for in depth dialogue with those driving the industry’s collaborative progress.

Attendees will learn the scientific and engineering principles of next-generation, thermally driven adsorption chillers that convert low-temperature data-center waste heat into cooling. The session will analyze the main bottlenecks of adsorption systems—limited heat and mass transfer in adsorbents and heat exchangers—leading to slow cycling, low power density, and large volumes. It will present materials and structuring strategies for high-capacity adsorbent coatings on heat-exchanger fins while minimizing thermal and mass-transport resistances, enabling faster cycles, higher specific cooling power, and improved active-to-dead-mass ratio. A temperature-jump characterization method will be introduced to quantify transport limitations and guide design optimization. The roadmap will be discussed from a 10 kW demonstrator producing cooling from 45 °C GPU waste heat, including engineering considerations for scaling toward 100 kW-class cooling units.

As compute platforms rapidly evolve, firmware stacks are becoming larger, more complex, and harder to scale using traditional manual approaches. This session introduces an agentic AI–driven framework that brings intelligent automation to firmware development and deployment across embedded and server platforms. We show how generative AI agents automate platform code generation and orchestration, including platform configuration and porting files, Redfish schemas, OpenBMC code, UEFI debug log analysis, and end-to-end deployment from natural-language prompts. Integrated test and validation agents verify outputs against system specifications and security requirements such as Cyber Resilience Act (CRA) compliance using vulnerability analysis and Software Bill of Materials (SBOM) reporting. Real-world examples demonstrate how agentic AI accelerates open-standard adoption, strengthens firmware security, improves engineering productivity, and reduces time-to-market for ODM and OEM platforms.

Global demand for AI and HPC is rising faster than new hardware can be produced, creating long and unpredictable lead times. This session explores how remanufactured OCP racks built from standardized, hyperscale grade hardware offer an open alternative for rapid deployment path while supporting the OCP Sustainability Project’s mission to extend hardware life and reduce environmental impact. With OCP Solution Providers like RackRenew supporting large scale remanufacturing, organizations gain immediate access to fully tested systems that meet OCP specifications, lowers CapEx and accelerates procurement cycles. Organizations are empowered to achieve quantifiable ROI without sacrificing performance or reliability. The session will share data driven examples showing how ready to deploy OCP hardware shortens procurement cycles, reduces integration complexity, and enables more predictable scaling. By extending the life of OCP compliant equipment through open, engineering driven processes.

As single-phase (1P) direct liquid cooling becomes the dominant thermal strategy for next-generation data centers, long-term reliability and scalability are critical to ecosystem confidence and investment. This presentation shares CoolIT’s work validating the durability and performance of 1P liquid cooling, including results from 4 kW and 15 kW designs, demonstrating its readiness for future data center architectures. We explore how server-level cooling is evolving toward 100% heat capture, driving innovation beyond CPUs and GPUs to address peripheral components through more efficient liquid cooling module design. Finally, we examine emerging high heat‑flux challenges posed by next-generation processors and outline how 1P cooling architectures can be adapted to meet these demands, ensuring continuity and minimizing disruption as thermal requirements continue to accelerate.

Multi‑tenant bare‑metal infrastructure requires reliable cleanup between tenants to prevent cross‑tenant data and firmware contamination. Current methods often fully wipe device firmware flash to remove residual code, which is slow, costly, and accelerates flash wearout. This work presents an attested fine‑grained device restoration method that returns partitioned non‑volatile memory to a known‑good state without full wipes. It maintains cryptographic reference measurements per memory segment, compares them with current values, and overwrites only altered segments. This approach is very scalable and applicable to GPUs, NICs, storage controllers, and diverse platforms, it aligns with attestation workflows so verifiers can confirm device integrity before reuse. The paper urges standardization through groups like OCP, DMTF, of segment‑level measurements, selective overwrite semantics, and interoperable attestation protocols for secure lifecycle management

There is increasing demand for building scale-up clusters, which are the systems that tightly couple large numbers of GPUs to minimize communication overhead for both training and inference workloads. Currently, there are several approaches to building such scale-up GPU clusters. Broadly, they fall into three major categories: using proprietary interconnect protocols, leveraging standard Ethernet, or deploying UAL fabrics. Among these, the SONiC community is focusing on how to enable and optimize Ethernet-based scale-up AI clusters, which offer openness, flexibility, reliability and ecosystem compatibility.

• System-Level Efficiency Gains of HTS Distribution for AI Clusters: A Comparative Power Analysis  by Guido Macchi and Sath Ganesarajah • High-Efficiency Two-Phase DI Water DLC for Next-Gen AI Servers by Ching-chih Wei • Iron-Sodium Batteries for Emissions-Free Backup and Load-leveling at AI Data Centers by Ben Kaun and  Gerro Prinsloo • PFAS-Free Two-Phase Direct-to-Chip Cooling Using a Glide Refrigerant by Richard Bonner and Qingyang Wang • Utilizing Data Center Waste Heat to Generate High-Temperature Steam via an Adsorption Heat Pump by Yajing Zhao • Validating Extreme IT Loads: A Cost-Effective Test Methodology using Server Emulators by Tina Stark and David Esteban Avilés

“Sovereign cloud” in Germany isn’t just about where data sits. It’s about who controls the stack:  including the hardware supply chain, firmware, operations, and the ability to switch vendors without re-inventing the wheel. In this session we’ll show how OCP hardware enables a sovereign offering: open specs (servers, racks, power, cooling), multi-vendor procurement, and a modular design that keeps you in control of cost, performance, and lifecycle. We’ll connect the dots between vendor-agnostic hardware, energy-efficient infrastructure (a hard constraint in Germany), and day-2 operations: validation, sparing, secure management, and auditability. Expect real-world patterns, lessons learned, and a practical “start small, scale regions” blueprint for building sovereign infrastructure that doesn’t turn into a one-off science project.

This session provides an OBMF Work Stream update on recent spec developments. We cover the newly released OBMF USB Binding specification (native OBMF-ICP over USB) and the latest enhancements introducing OBMF optimized channels for efficient devices management. We also share the Datacenter-Ready Device vision and how OBMF fits within other OCP specs to enable secure, recoverable, and scalable datacenter hardware.

Storage has become one of the most critical — and underestimated — foundations of the AI era. As AI drives unprecedented data growth, organizations face mounting pressure on infrastructure, energy consumption, and sustainability. This keynote reframes storage not as passive infrastructure, but as a strategic enabler of innovation, resilience, and long‑term scalability. Drawing on real‑world data trends and emerging AI workloads, the session will explain why hard disk drives remain the backbone of global data infrastructure and how breakthroughs in areal density and HAMR‑based innovation are redefining what’s possible. Attendees will gain a clear perspective on how smarter storage choices can unlock AI’s full potential — responsibly, efficiently, and at scale.

This innovation introduces a secure, hardware‑anchored method for provisioning RPMC (Replay Protected Memory Block Counter) keys and flash‑encryption keys through the OCP LOCK mechanism. By leveraging the Caliptra silicon root‑of‑trust, all sensitive key operations occur inside a protected execution boundary, preventing exposure to firmware, host software, or external interfaces. The design mitigates threats such as tampered flash, compromised firmware, and invasive hardware attacks by ensuring that keys, intermediate values, and derivation seeds never leave the secure subsystem. Seeds are zeroized immediately after use, preventing offline reconstruction of key material. This approach delivers a scalable, lifecycle‑independent, and platform‑agnostic mechanism for securing flash storage and counters in cloud and hyperscale environments that demand strong confidentiality, integrity, and resilience.

All are welcome to stop by and connect with the WOCP! After the Social Hour and Welcome Reception, make plans to join us at the OCP EMEA Liquid Cool Down Beach Bar Event: Join us for an unforgettable evening on behalf of OCP Immersion Community Outreach at Go Beach Club Barcelona full of productive networking, Cocktails and Small Bites, only a quick 20 minute walk from the Barcelona International Convention Center. Date/Time: Wednesday, April 29th; 19:30p.m.-22:30p.m. Click to register!

More information coming soon.

More information coming soon.

Welcome & Kickoff Address

OCP Open Systems for AI Community Update

This presentation outlines Tenstorrent’s mission to break the cost and complexity barriers of modern chip design driven by the AI wave. To enable innovators to "own their silicon future" , we introduce the Open Chiplet Atlas™ (OCA) Ecosystem—an open, ISA-neutral architecture ensuring chiplet interoperability without vendor lock-in.   The ecosystem defines a comprehensive 5-layer open solution spanning Physical, Transport, Protocol, System, and Software layers. It features the OCA Harness, a dedicated framework managing essential non-application logic such as security, boot, and system management.   Crucially, Tenstorrent is fully releasing the OCA Harness repository as open source. This reference design allows developers globally to bypass complex infrastructure design, reducing non-recurrent-engineering costs and enabling a focus on differentiating application logic. We actively invite the community to adopt this tool and contribute to the standard.

As data center demand accelerates across EMEA, access to timely, reliable power has become a primary constraint on growth. One of the most persistent barriers to faster interconnection and deployment is not technology, but misalignment: data centers and utilities often lack a shared language to describe flexibility capabilities, expectations, and value. In this session, we will introduce the Flexibility Framework being developed in the collaboration between OCP’s Energy Project(??) and EPRI’s DCFlex initiative—a practical, scalable approach designed to create a common language of flexibility between data centers and electric utilities. The framework defines clear, graduated tiers of operational flexibility, enabling utilities to better understand what data centers can reliably provide in response to grid needs, and enabling data center operators to clearly signal flexibility attributes that can accelerate planning, interconnection, and speed to power. The session will outline the purpose and structure of the framework, explain how it supports faster, more predictable utility engagement, and demonstrate how standardized flexibility definitions can reduce friction across planning, interconnection, and operations. Attendees will also have access to the roadmap to the practical tools, processes, and programs being developed alongside the framework that will support real‑world implementation and adoption. The session will conclude with an overview of the adoption roadmap, highlighting how the framework and its supporting resources will be rolled out for industry use by year end, and how OCP community members can engage in early adoption and validation.

This presentation will include a brief introduction to the OCP Sustainability Project, and then focus on updates from each of the workstreams, including introductions to new streams:    Working Groups: • Joint Project on Carbon Disclosure • Data Center Efficiency Metrics • CIT Circularity • LCA PCR Development • Water Efficiency • Climate Risk and Resilience • Emissions Free Backup Power

This session opens with a data-grounded analysis of liquid cooling industry trends, drawing on industry analytics to examine the decisive growth phase now unfolding across the data center sector. The discussion explores the drivers behind necessity-driven adoption, including rising compute densities, supply chain maturation and the evolving roles of immersion and cold plate technologies. The session then provides an overview of the Cooling Environments Project, covering its structure, current workstreams and the growing global community contributing to its development. The session closes with a focused update from the Cold Plate subproject, highlighting recent progress, priorities and ongoing work to support scalable direct-to-chip cooling deployments.

Over the past few years, the industry has focused on making photonic integrated circuits (PICs) truly scalable, both in functionality—by integrating thousands of photonic elements on a single chip—and in manufacturability, by leveraging high-volume industrial fabrication lines. In this talk, we cover the evolution of programmable integrated photonics from its inception to its promising role in AI data centers.

At Meta, we build and deploy AI clusters with reliability engineered into the system from the start—not as a day‑2 hardening exercise, but as a foundational principle that enables high and predictable performance for AI workloads at massive scale. In this session, we will connect Meta’s OCP contributions in open networking and disaggregated platforms to a broader theme: reliability-by-design through end-to-end co-design. We’ll discuss how we coordinate decisions across open switch platforms and optics, the network software stack, and the AI communications layer so that the system behaves predictably under real operational conditions. Rather than treating “fault tolerance” as a patchwork of mitigations, we focus on defining intentional fault-tolerance domains and designing the communication paths and recovery behaviors around them—so reliability becomes a direct enabler of repeatable workload performance.

Moving from monolithic SoCs to heterogeneous chiplets requires a unified system specification. For a multi-vendor marketplace to thrive, interoperability must extend beyond physical wires. We need a cohesive System-in-Package (SiP) specification that manages discrete dies as a single entity.This presentation introduces the OCP Chiplet System Group’s framework for multi-vendor integration, focusing on: • Communication: Aligning PHY and Link layers for seamless data movement. • Management: Defining cross-die protocols for Boot-up, Power, Thermal, and Performance. • Security: Establishing a multi-vendor "Root of Trust" for attestation and firmware integrity. • Software Layer: A standardized stack to abstract hardware complexity for OS/hypervisor integration. By defining these parameters, we provide a blueprint for a secure, performant chiplet ecosystem, giving architects the same confidence as with traditional monolithic designs.

AI-driven data centers are entering an era where physical operations are becoming as complex as the computing workloads they support. Operational teams must manage height, weight, heat, urgency, and risk—often simultaneously—while keeping dense AI clusters online. These challenges expose a widening gap between manual workflows and what modern AI infrastructure demands. Across the industry, robotics is emerging as a key layer of infrastructure where humans face limitations: moving larger racks, inspecting hard-to-reach areas, sensing thermal or structural anomalies, and helping accelerate service recovery in time-critical situations. This session highlights how a unified robotics ecosystem—spanning mobility, sensing, and manipulation—can help data centers scale safely and predictably. We outline an integrated automation framework and propose open design principles the OCP community can adopt to build robotics-ready facilities that enable safer, more efficient human-robot co-work.

As data center hardware refresh cycles accelerate—driven by AI‑optimized architectures—the industry is experiencing a disproportionate increase in Scope 3 embodied carbon and economic value leakage. Strategies have historically emphasized operational efficiency (PUE) and end‑of‑life recovery, a reactive model that fails to address the “latency of circularity” embedded in modern compute lifecycles. This session introduces Upstream Circularity: a framework that applies agentic AI, silicon‑level telemetry, and condition monitoring to enable real‑time decisions. By coupling hardware health signals with economic and sustainability objectives, this replaces static refresh policies with condition‑based asset orchestration. High‑density platforms are often retired despite substantial remaining performance headroom, resulting in premature decommissioning of viable silicon. We examine how telemetry‑driven transitions preserve value until constrained by the physical limits of the silicon itself.

As data center power densities accelerate, two-phase cold plate cooling using dielectric fluids is emerging as a critical technology for next-generation IT infrastructure. However, the lack of unified guidelines and base specifications has slowed adoption, interoperability, and large-scale deployment. This breakout will present the ongoing work within OCP to define practical guidelines and a base specification framework for dielectric fluid-based two-phase cold plate heat transfer fluids. The session will cover key technical parameters including thermophysical properties, material compatibility, reliability considerations, safety, and environmental aspects. Attendees will gain insight into how standardized definitions and testing methodologies can reduce risk, enable multi-vendor ecosystems, and accelerate innovation across the liquid cooling value chain.

Energy‑Efficient Optical Interconnects for Multi‑Rack AI Pods

Grounded in the principles of the OCP Server/CMS Working Group, this talk explores architectures based on fabric-attached, shared, disaggregated, and non-volatile memory to meet the rapidly growing memory demands of XPUs. We present memory fabrics enabled by smart memory devices that perform in-situ data transformation and reduction—compression, deduplication, quantization—along with protection and dynamic tiering. These capabilities enable AI-native data services including distributed KV caches for long-context LLM serving, embedding stores for recommender systems, and vector databases for RAG. This approach addresses key challenges of XPU far memory by hiding access latency, reducing data movement across the AI fabric, lowering energy consumption, and improving performance and operational efficiency. We also outline an architectural direction aligned with open-source software, open data formats, and emerging standards to accelerate adoption of smart memory and storage at scale.

Training and inference are driving a need for the heterogeneous integration of best-in-class compute with highly optimised accelerators within a single integrated circuit. Composable chiplets provide a path to accelerating innovation and reducing time to market by enabling development costs to be shared across multiple designs. The new OCP Foundation Chiplet System Architecture (FCSA) provides a neutral but effective baseline for cross-industry collaboration that will accelerate the delivery of composable and reusable chiplet ecosystem. In this talk, we’ll describe the progress that the FCSA is already making, how modular systems can be developed for AI without sacrificing performance, and the priority areas for standardization.

Data Center operators looking to make low-carbon procurement decisions rely on availability of valid and comparable data. Since the publication of the Base Specification for Embodied Carbon Disclosure in August 2025, the joint effort between OCP and the iMasons Climate Accord has laid plans to increase rigor in the specification, foster collaboration between data center owner/operators and their suppliers, and increase visibility of carbon-disclosure-ready products on OCP Marketplace. This effort recognizes that there are different pathways for carbon disclosure and reductions within procurement categories - IT, MEP, and Materials - and has built out distinct workstreams for these three categories, supported by supplier engagement and visibility in OCP Marketplace. Workstream leadership will share progress and activities they are undertaking to publish the updated specification and how they are enabling use of the specification among data center owner/operators and vendors alike.

This is a one hour overview of the work being done within the OCP Open DC Initiative.  The Open Data Center (Open DC) Initiative is advancing an open, scalable blueprint for next-generation AI data centers by aligning industry leaders across multiple workstreams that address the most urgent infrastructure challenges. This hour-long talk will highlight progress across Open DC specification harmonization at the rack, pod, and scalable unit level, including shared hyperscaler and silicon provider architectures; energy and grid integration efforts focused on enabling faster power availability through flexibility toolkits such as BESS, low-voltage ride-through engineering standards, and behind-the-meter generation models; and power estimation methodologies that define consistent semantics for max, average, provisioned, and utilized load across compute, networking, and storage.

NVIDIA Co-packaged optics (CPO) switches with integrated silicon photonics are the world’s most advanced networking solution for the era of agentic AI. They integrate optics innovations, including the first 1.6T CPO chip based on new micro ring modulators, 3-D-Stacked silicon photonics engines, high power lasers, and detachable fiber connectors. The CPO switches deliver 3.5x more power efficiency, 63x greater signal integrity, 10x better network resiliency at scale, and 1.3x faster deployment compared with traditional methods. NVIDIA co-invented the switch photonics with an ecosystem of partners, and designed it to fit into the OCP infrastructure and be managed by the Sonic operating system. Contributions to Sonic are being made to adjust it to the new CPO model. NVIDIA CPO-based networks simplify manageability and design, and enable more power for compute infrastructure. These benefits are critical to delivering the scale needed to enter the future of million-GPU AI Factories.

This session provides development updates for PBMC (Pivoting Blind Mate Coupling), first introduced in 2025, including test progress,  design updates, and performance capabilities.  We will highlight the way the design adapts to misalignment and share the PBMC Design Specification that is targeted for release in Q2 ’26.  Background: PBMC is a valve design being developed in the Blind Mate CLA group that includes multiple suppliers to support deployment at scale and ensure reliable interoperability. Close collaboration and extensive interoperability testing are core to the development effort. To support higher power systems, PBMC has significantly high flow capability and relatively low pressure drop.  The design includes fully integrated floating and alignment features to accommodate misalignment. The design also enables hose selection flexibility and routing inside IT gear.

As AI workloads scale, deploying diverse accelerators is critical. At Meta, we integrated AMD GPUs for AI inference and training at hyperscale, alongside existing accelerators. This talk shares key learnings from: • Designing for heterogeneous environments and integrating AMD GPUs into large-scale production. • Strategies for provisioning, orchestrating, and managing thousands of GPUs globally. • Optimizing Meta’s AI frameworks and models for AMD GPU capabilities. • Overcoming operational challenges in hardware validation, firmware, and monitoring. • Leveraging open standards and OCP community collaboration to accelerate progress.

How confident are you in your upstream Scope 3 numbers? Carbon estimates for IT hardware come from different sources: supplier Product Carbon Footprints (PCFs), teardown studies, proxy matching, parametric modeling, and spend-based emission factors, yet there's no widely adopted way to assess and compare data quality across these methods. Through the OCP Sustainability Project, Fraunhofer IZM, Meta, Google, Microsoft, and AWS are developing a multi-criteria data quality scoring system for IT hardware Life Cycle Assessments (LCAs) built on PACT's Data Quality Indicators. A single, accessible scoring system encourages adoption, enabling transparent comparison, automated data selection at the component and product level, and prioritization across hardware portfolios. We share this open framework to invite community input and explore integration into sustainability workflows. As a living standard, we welcome feedback and contributions to keep it evolving with industry needs.

Modern multi‑die architectures make system‑level connectivity the key bottleneck and enabler for next‑generation compute. As AI demand grows and datacenters hit power and physical limits, efficient D2D, chip‑to‑chip, and rack‑scale interconnects are essential. This work explores the chiplet evolution, covering system‑architected integration across compute, memory, electrical and optical I/O; advances in sub‑pJ/bit D2D interfaces; off‑package scaling with PCIe, Ethernet, UALink, and UEC; and the rising role of optical interconnects such as CPO and NPO for higher reach and bandwidth density. It outlines pathways for energy‑efficient AI scale‑up through packaging, optical IO, and improved bandwidth density. Key challenges include bandwidth scaling, latency control, SI/PI complexity, thermal and mechanical reliability, yield compounding, and vendor interoperability. Optical I/O brings new thermal and reliability demands but is essential for future high‑performance systems as needed..

To address the need for industry-aligned validation methods, this work presents an interoperability testing framework and performance characterization findings for Universal Quick Disconnects (UQDs). The study focuses on flow performance, pressure drop variation, and seal washout. The results establish a performance envelope for benchmark comparison, highlighting the amount that flow coefficients (Cv) can vary, considerations for safely disconnecting under flow, and best practices for blindmating. Looking forward, the roadmap for UQD includes exploration of an expanded portfolio, unified benchmarks and reference specifications for general QD qualification, and definition of system-level to better define long term reliability. Ultimately, the goal is to advance data center liquid cooling toward a plug-and-play ecosystem where UQD interchangeability is verified not just for connection fit but for full fluid dynamic and mechanical reliability equivalence.

The unprecedented network growth to support the acceleration of AI expansion has created a huge surge for datacom transceivers and related sub-components. At the same time, the current geopolitical situation calls for a resilient and more local supply chain. We started ESTEL in response to these two trends. The company designs and produces optical transceivers locally in Europe with R&D based in Sweden and will also launch production in USA. This presentation will detail our pluggable transceiver development approach and manufacturing strategy. ESTEL currently sees a growing number of customers in Europe and USA requesting alternatives to transceivers manufactured in Asia. In Europe these requests are further enhanced by the introduction of the Cyber Resilient Act (CRA, [1]) that will be a law in full force by end of calendar year 2027. The CRA law entails extended traceability and control of both the HW and FW supply chain.

This presentation will discuss the OCP Base Specification for Clean Backup Power Technology which  guides the data center industry's transition from diesel generators to sustainable, high-reliability emergency power. Its primary purpose is to standardize requirements for clean backup technologies—systems that minimize operational (Scope 1) CO2e emissions—and clean transition technologies, which can significantly reduce Scope 1 emissions compared to diesel. The specification is technology agnostic, encompassing solutions such as Fuel Cells, Energy Storage Systems (Energy Storage Systems /Long Duration Energy Storage), and Clean-fueled Generators (e.g., renewable natural gas, hydrogen).

As chiplet-based architecture becomes foundational to next-generation AI and cloud infrastructure, the ability to validate system behavior early—before silicon is available—is critical to reducing risk and accelerating time-to-market. This presentation from Cadence and Insyde explores how “shift-left” firmware enablement in emulation environments bridges the gap between chiplet verification and full system readiness. By integrating production-grade firmware—including UEFI BIOS, chiplet management firmware (SCP/MCP), and OpenBMC—directly into Cadence’s emulation platforms, chiplet designers can experience realistic boot flows, power and reset behavior, RAS handling, and early OS interactions months earlier in the development lifecycle. This shift enables silicon teams, platform architects, and OCP ecosystem partners to move from isolated chiplet validation toward true system-level co-design, improving confidence, interoperability, and alignment with OCP and Arm SystemReady requirements.

AI demands capacity FAST—not just GPUs but CPUs too. Meta implemented a hybrid strategy: expanding private datacenter capacity while leveraging public cloud. In 2025, Meta deployed 1.3M+ GPUs, complemented by partnership with multiple hyper-scale cloud providers as well as neoCloud providers. This approach achieved the agility AI requires—but wasn't without challenges. This session will share the top lessons we learned, ranging from technical understandings of hardware, network, datacenter, and many Meta Infrastructure teams, to the technology implementation considerations related to speed vs. control trade-off. Our experience in the last 18 months clearly demonstrates how OCP standards enabled seamless private-to-cloud interoperability, and we hope our learnings from this large implementation can benefit the OCP community members with similar needs.

As liquid cooling becomes the mainstream approach for AI accelerators, validating the reliability of coldplates is critical to deploying an effective, leak-free cooling system. This presentation outlines the Coldplate Base Specification and the validation requirements necessary for submitting a cold plate design. It summarizes the performance and reliability tests, including thermal characterization, flow and pressure evaluation, mechanical integrity assessments, environmental stress testing, and cleanliness verification. These tests demonstrate readiness for deployment in data center environments. Attendees will gain a clear understanding of the required test evidence, acceptance criteria, and documentation package needed to support a complete cold plate qualification.

PICs for Quantum and AI

Silent data corruption (SDC) is a uniquely difficult class of failures—often hard to detect, characterize, and prevent. Diagnosing and fixing SDC can take months of deep debugging. SDC can have outsized impact at fleet scale, and its importance is growing as data centers and clusters expand to support increasing AI workloads. To address this, AMD, Arm, Google, Intel, Meta, Microsoft, and NVIDIA partnered in 2022 under the HW Management Project to develop the Server Compute Resiliency Specification. The effort also includes a dedicated collaboration with multiple universities—funded through the workstream via the Open Compute Project (OCP)—to accelerate research in this area. Major milestones were achieved with the release of Specification 1.0 around the 2024 OCP Global Summit. Following that, we published Silent Data Corruption in AI Whitepaper.

As high-density and liquid-cooled data center infrastructure scales with AI workloads, alignment between open hardware and global standards is essential. This session from the OCP Industry Liaison Team reviews active engagement with ASHRAE, ASTM International, UL, NFPA, and IEC to support interoperable, scalable, and safe designs. We highlight coordination with ASHRAE TC 9.9 on thermal and energy guidelines, ASTM on cooling fluid test methods , UL on safety certification pathways, NFPA on fire and life-safety codes in high-density environments, and IEC standards impacting power, cooling interfaces, and environmental classes. The session will summarize progress, identify gaps where OCP contributions can inform terminology and test methods, and propose next steps for harmonizing open infrastructure specifications with widely adopted international standards to reduce deployment risk and accelerate adoption.

For 3 years, the OCP Modular Technology Cooling (TCS) workstream has been collecting, testing, and evolving industry best practices addressing cooling challenges created by the escalation of IT rack densities and asset valuation. As racks scale from hundreds of KW to MW-class deployments, traditional cooling design and delivery models have struggled. This session highlights the white paper evolution, summarizing key guidance developed through open, global community-driven collaboration.  Topics include modular design principles, commissioning strategy, cleanliness and filtration, interfaces, and fluid performance considerations that directly impact reliability and speed of deployment. The overview leads into panel discussions, including deep dives into commissioning acceleration, modular “LEGO pipeline” approaches scaling toward 1 MW racks, and Technology Cooling System fluid control, maintenance, and SLA considerations.

The combination of novel device technologies and advanced 3D assembly technology such as hybrid bonding can be leveraged to realize wafer-scale optical interconnect with 10Tb/s/mm shoreline densities.

This engaging, fastpaced session explores the most important topics for data centre owners and stakeholders striving for sustainable operations across EMEA. It highlights a suite of new and evolving tools for heat reuse (HR). First, the European Heat Reuse Platform a collaboration between the EUDCA, OCP, EuroHeat & Power, the Net Zero Innovation Hub, and several major enterprises it aims to link data centres with district heating networks across Europe, supported by an intuitive new mapbased tool. Next, the HR Policies, Liaison and Outreach workstream which introduces its AIdriven tool offering uptodate insights on policies, incentives, and regulatory developments that impact HR projects. Finally, the HR Reference Design team shares its latest technical updates, and HR Economics presents a new tool that models the financial performance of the data centre heat exchange room, helping stakeholders understand the value potential of heat reuse.

Data center companies are increasingly adopting chiplets to reduce schedule risk and rapidly deliver multi-die SoC and chiplet derivatives from a shared architectural baseline. In this joint talk, Cadence & Arm will showcase chiplet-based SoC development using pre-integrated, pre-verified building blocks to ensure interoperability with Cadence IP and remove months from SoC and chiplet development.  Pre‑silicon chiplet verification is enabled using Arm’s Foundation Chiplet System Architecture (FCSA), aligned with OCP Open Chiplet Economy guidelines, leveraging simulation for early architectural interoperability assessment and multi‑vendor ecosystem collaboration. As part of the Arm Total Design ecosystem, we will also present a proof-of-concept emulation platform using Arm Neoverse™ CSS and Cadence® Design IP, including UCIe™ die-to-die links, memory (e.g., LPDDR), and IO fabrics (PCIe®, CXL), demonstrating a practical path to validated chiplet system.

As Meta’s AI infrastructure scales to massive, multi-gigawatt data centers, managing the highly diverse communication demands across the Large Language Model (LLM) lifecycle has become a critical challenge. This talk presents the several communication library components developed at Meta, engineered to optimize performance across the full LLM lifecycle, from the synchronous demands of large-scale training to the low-latency requirements of inference. The framework is designed to support complex workloads on clusters exceeding 100,000 GPUs, ensuring reliable, high-throughput, and low-latency data exchange.

The Door Heat Exchanger Sub‑Project within OCP’s Cooling Environments track is focused on lowering barriers to liquid‑cooling adoption through open specifications, white papers, and case studies. Current work now spans several areas: advancing material and coolant readiness, maturing interoperable product specifications, refining system‑level integration and control models, and expanding deployment architectures—including emerging sidecar form factors—to support higher rack power densities. These efforts are closely coordinated with other OCP initiatives to assess sustainability impacts, enable greater IT equipment density, and develop reference designs informed by large‑scale deployments. This session will share progress across these categories and invite community engagement on the key challenges and opportunities shaping next‑generation Door HX solutions.

VCSEL-based transceivers are highly attractive in terms of power efficiency thanks to their low-current direct-modulation characteristics. The usage of VCSEL has been expected to realize low link energy of <1 pJ.bit for scale-up in front-end network. This presentation describes high-energy efficient ultra-compact 1060-nm SM VCSEL-based transceivers for full-reach datacenter links.

AI factories are rapidly scaling from today’s 100 kW–220 kW racks to 1 MW per rack, creating challenges for technology cooling infrastructure to keep pace. This panel is rooted in ongoing work within the Open Compute Project (OCP) Modular Technology Cooling (TCS) workstream and its evolving whitepaper. It represents an active, open industry discussion on how modular cooling systems can form a scalable “pipeline” that adapts as rack power increases. Using the analogy of “LEGO sets,” panelists will explore how standardized, pre-engineered cooling building blocks—including piping, manifolds, CDUs, filtration, controls, and fluid performance requirements—can be assembled, extended, and reused across multiple generations of AI infrastructure, from 100 kW to 1 MW per rack. The session emphasizes community-driven learning, showcasing how real-world deployments are informing OCP guidance in real time and shaping the next evolution of modular technology cooling for the AI era.

Ask ten engineers "what's in a rack?" and you'll get ten different answers. Without a shared framework to dissect a physical rack, we cannot correctly allocate emissions to specific parts. This gap prevents aggregating discrete datasets into a cohesive system model, creating barriers to identify hotspots, verify completeness, or compare results. To bridge this, the OCP PCR Project - led by Fraunhofer IZM, Meta, Google, Microsoft, and AWS developed a standardized three-tier taxonomy (Rack → Tray → PCBA) with detailed sub-classifications. We will demonstrate mapping this system to Product Lifecycle Management and BOM structures, enabling LCA automation, consistent supplier engagement, and cross-organization data exchange and comparison. Bring your hardware architectures: we'll show how to apply the proposed framework and share how carbon data breakdowns evolve for current and emerging systems like AI accelerator racks and liquid cooling. We invite feedback on gaps and refinements.

Scaling AI clusters to thousands of accelerators demands fabrics that transcend traditional silicon and photonics boundaries. We present an open reference architecture for next-gen AI fabrics, extending OCP MHS principles to support chiplet driven ecosystems and software-defined control via SAI. We propose a 2 Open Rack Unit (ORU) switch design aligned with IEEE 802.3/OIF roadmaps for 200G-per-lane signaling. The architecture supports low-latency scale-up and scale-out while addressing the shift toward disaggregated chiplet designs. Crucially, a RAS-first approach uses OIF-compliant ELSFP modules to decouple laser thermals from switch ASICs. This facilitates field-replaceable light sources alongside CPO, fostering a robust, open component ecosystem.

As part of the OCP Strategic Initiative for Open Cluster Designs for AI, we are developing a reference architecture for clusters capable of training large-scale AI models with thousands of accelerators (xPUs). This presentation summarizes the key pillars of an open architecture, including compute, network, storage, and management infrastructure. The design has been successfully validated across various accelerators (GPUs and ASICs) during MLPerf training runs. Further details can be found in two recently published OCP whitepapers—Open Cluster for N xPUs and Open Pod Group for xPUs—which incorporate contributions from leading cluster design experts across the industry.

Total Cost of Ownership (TCO) models the business case for change, by accounting for Operational and Capital Expenditure, relating usage of resources (power, cooling, water, space, human) and expressing those is the form of recognized metrics. The OCP CE immersion TCO workstream has developed an open model for all a range of air- and liquid-cooled data center builds and operations. The new release is for all types and hybrids of liquid-cooling to enables comparison cooling approaches and see the benefits and sensitivities to design choices and operational variances. The session will focus on a tour of the TCO model scope and features (present tool data input, processing and output for energy (heat and power), water, floor area), air-cooled and immersion cooled benchmarks, and power loss sensitivity to key design parameters (COP, efficiency) and stack-up into metrics (PUE, WUE, ERE). finishing with a call for testers and feedback, and a roadmap for future tool development.

The performance and power-efficiency scaling challenges, driven by modern AI workloads, demand new technological and architectural computing concepts. Integrating optical interconnects deep into the system through co‑packaged optics (CPO) is key for advancing classical digital systems. Analog photonic signal processing approaches may overcome the processing-memory communication bottleneck.

In 2025, Meta embedded sustainability into its hardware New Product Introduction process, making carbon assessment a standard gate for every new rack design. With AI-powered tooling integrated directly into design workflows, teams estimate Scope 3 emissions before BOMs exist, reducing weeks of analysis to days. In its first year, the program covered 100% of new designs at approval, identified reduction opportunities in 60% of programs, and achieved ~12% weighted emission reductions. Semiconductors represent ~80% of server embodied carbon, yet remain the hardest to model. To close this gap, Meta partnered with IMEC to leverage imec.netzero, a physics-based tool for IC carbon footprints. We show how outputs scale from ICs to CPUs using chiplet-level modeling, and to fleet-wide estimates using a TDP-based linear model we propose to share openly. We propose open-sourcing some of our DfS tools as part of the OCP PCR toolkit and invite organizations to pilot the methodology.

This panel discussion would address the OCP special focus on distributed AI infrastructure - the standardization and deployment of open hardware across geographically distributed environments from hyperscale data centers to edge locations where data is created and consumed. We want to openly discuss whether open silicon can enable sustainable, economically viable AI acceleration across centralized and distributed deployments, or if fragmentation and lack of standardization will perpetuate proprietary vendor lock-in.

This presentation will detail the updates and changes made to the ORW rack specification initially discussed at the OCP Global Summit in 2025. We will discuss mechanical changes based on physical testing data and FEA to improve the overall structure to enable a significant payload increase (circa 34% rise), which the rack spec will be updated to reflect. Further changes to the rack frame assembly process to enable improved tolerances through design & assembly. Additionally we will discuss accessories and security features to be included, such as doors and side panels, and a modified lower airflow containment seal design describing the benefits. The presentation will go on to discuss the tolerances associated with the current design (previously omitted from the original presentation), and will give an availability date for the updated reference CAD.

Future 6G will extend far beyond today’s communication services, with AI enabling immersive experiences across devices such as smart glasses, sensors, drones, robots, and autonomous vehicles. These applications require tightly integrated compute within 6G networks, with hyperscale and edge systems—potentially at least a full rack—supporting AI inferencing. Meeting needs for flexibility, resilience, sustainability, and efficiency demands a holistic approach. High‑power microprocessors require liquid cooling and efficient heat transport for reuse, alongside robust power distribution and integration with wider energy systems. Supported by Vinnova and RISE, several European partners are developing a 1 MW rack proof‑of‑concept using chip load emulators to validate power delivery, thermal management, and heat reuse. Castrol and RISE will present the project’s progress and next steps.

AI Infra is entering its uncomfortable phase. Scaling from 100k GPUs to million-accelerator systems isn’t about buying more silicon- it’s exposing structural limits in how memory, fabric, and accelerators actually work together. Within the OCP, initiatives like (CMS), ESUN, and AI & HPC Systems & Fabric address parts of the problem, but operators still lack a system-level answer. This panel brings together leaders from multiple OCP WG & FTI forum to examine what breaks first in real deployments: for neoclouds, where multi-vendor integration, power constraints, and performance guarantees are non-negotiable. Moving beyond NVIDIA-centric assumptions, the discussion includes heterogeneous architectures (AMD, Groq, Cerebras, SambaNova, Rebellions) and asks what composability really means when endpoint behavior, memory hierarchies, and fabrics diverge. The goal: separate architectures that scale on slides from those that survive contact with production AI factories.

Artificial intelligence infrastructure is driving an unprecedented expansion in data-centre networking, requiring ever greater bandwidth while keeping tight control on power consumption. Four companies on the panel will discuss how AI networking is evolving. Two, Credo and Astera Labs, have benefited from providing increasingly efficient connectivity solutions based on electrical switching architectures for ever-larger GPU clusters. The two other participants are start-ups: Oriole Networks and Astrape Networks. They propose more radical photonic switching architectures using wavelength-division multiplexing (WDM) to enable scaling and reduce power. But such solutions need an ecosystem of optical components—including wavelength-selective switches, frequency comb sources, and fast tunable lasers—raising questions about technological maturity, cost, operational readiness and risk. The panel will explore the merits of the two approaches to meet AI’s needs, the best options and why, and the market opportunities for the different solutions. The panel will also address the more general question of incumbents versus disruptors, and what it takes to successfully advance and establish new technologies in an era of rapid change.

The OCP PCR Project (with Fraunhofer IZM, Meta, Google, Microsoft, AWS) is developing standardized Product Category Rules (PCR) for Life Cycle Assessment (LCA) of datacenter equipment. Today, carbon accounting for datacenters lacks industry-wide methodology: supply chain data is shared inconsistently, system boundaries vary, and meaningful comparison remains challenging. As regulations evolve, the industry needs a common foundation. Through cross-industry collaboration, we are building consensus around a standardized taxonomy (from rack to component) and defining measurable data quality essential for Ecodesign, supply chain engagement, and Scope 3 reporting. This panel brings together working group contributors for a live discussion on progress, open challenges and community participation. We need industry validation, real-world testing of the methodology, and input on modeling priorities and granularity. Join us to shape the standard.

Energy Storage Systems (ESS) are increasingly deployed across hyperscale data centers—from rack and row to facility level—to support resiliency, AI-driven load dynamics, and sustainability. However, rapid adoption of new battery technologies has introduced safety, regulatory, and operational challenges that are unevenly addressed across regions. This breakout session provides an update on the ongoing OCP white paper defining OCP Ready™ requirements for ESS in hyperscale and AI data centers. It summarizes key findings on ESS architectures, chemistries, hazard mitigation, fire protection, testing, and emergency response, aligned with global standards such as NFPA 855, UL 9540A, and the IEC 62933 series. Attendees will gain a system-level view of how ESS safety and compliance must evolve to support next-generation AI facilities.

As AI rack densities increase, direct-to-chip heat transfer is becoming a foundational element of data center physical infrastructure. Current cold plate specifications commonly mandate PG25 heat transfer fluids to address corrosion control, biological stability, and filtration requirements. However, petroleum-based propylene glycol presents limitations in embodied carbon, and alignment with European sustainability and regulatory objectives. This session evaluates bio-based fluids as a direct alternative for AI data center liquid cooling loops. Based on operational deployments and OCP-aligned architectures, bio-based fluids enable a next‑generation single‑loop system that can connect cold plates directly to dry/adiabatic coolers or to heat‑reuse exchangers. The presentation positions bio-based fluids as an enabling component for single-loop cooling architectures, higher heat reuse temperatures, and sustainable AI data center infrastructure designed for long-term European deployment.

Couscous Salad with Edamame, Kalamata Olives, Corn, Peas, Snow Peas, Coriander & a Spicy Soy Vinaigrette VG/DF Curry Chicken Salad GF/DF Selection of Breads & Butter Assorted Sauces & Vinaigrettes Provençal Turkey with Baked Roots & Herbs GF/DF Grilled Hake Supreme with Parsley Oil GF/DF Vegetable & Mushroom Paella VG/GF/DF Hasselback Potatoes with Green & Red Mojo Sauce VG/GF/DF Roasted Vegetables with Romesco Sauce VG/GF/DF/Contains nuts Fresh Fruit Brochette VG/GF/DF Dark Chocolate & Mango Shot V/GF Praline Gianduja Cream with Candied Sunflower Seeds & Vanilla V/Contains nuts

Quantum Lunch

Why AI Computing Continuum at OCP

Understand the competing and conflicting requirements of scale-up and scale-out AI fabrics, and how to converge them using Ethernet technology to create a robust system of systems.  Scale Up fabrics are optimized for inference, prioritizing low-latency and efficient bandwidth for a unified GPU memory domain. These single-tier fabrics are designed for resilience, fault tolerance, and minimal transport overhead. Conversely, Scale Out fabrics are used for training large language models. They are multi-tiered and manage distributed GPU domains, addressing concerns like incast/outcast, congestion control, multipathing, and remote memory access.  In this presentation we will delve into details like memory vs network semantics, protocol overhead, latency considerations , fabric topology and congestion control algorithms using a standard ethernet technology to create a polymorphic architecture.

The unprecedented expansion of AI is driving explosive demand for compute infrastructure, while supply chain volatility creates persistent component shortages. Hardware circularity is a strategic imperative for business continuity and supply resilience. This presentation introduces a field-proven framework, embedding circularity into hardware design and operations. We detail a three-phase approach: Identification of reuse opportunities during Proof-of-Concept, Development and validation during New Product Introduction (NPI), and Scaling during mass production. We present use cases including switches, battery, rack frames sharing challenges and solutions implemented demonstrating cost savings, net zero goal progress, improved supply chain resilience. We plan to share this framework with the industry to gather feedback and unlock blockers, hoping to drive innovations around new sustainable modular designs.

The Power Distribution OCP sub-project is running since October 2025 and developing a white paper on Low Voltage Direct Current (LVDC) Distribution for data centers. LVDC eliminates multiple AC/DC conversions, improving efficiency and reducing complexity. The presentation will cover:   • System Design: system architecture, grid topologies, redundancy levels, and fault domain management • Voltage and Power Quality: voltage classes, power quality requirements, and regulatory/installation code impacts (NEC and IEC)   • System Earthing: available options with pros and cons   • Safety and Protection: protection and safety in Active DC Networks (ADCNs), including fault-limiting vs. fault-feeding converters, overcurrent protection devices (solid-state CBs), and ground-fault/electric shock protection • Key Components: high-level requirements for LVDC distribution components   • Codes and Standards: current gap analysis and proposed actions

The Immersion Project has entered a significant growth phase with major advancements in requirements, specifications, material compatibility work, and cross community collaboration. This session highlights the progress achieved over the past year and provides a comprehensive outlook on immersion cooling from technology evolution to supply chain readiness and deployment patterns. It clarifies how the project is supporting global adoption and what is next for the broader ecosystem.

AI Computing Continuum - Opportunity for IOWN and OCP

With many quantum computing startups and initiatives now close to or over a decade old, both public and private stakeholders are starting to expect a tangible technical or strategic advantage from quantum investments. Key players in the quantum computing industry have taken note and shifted their focus from early demonstrators and qubit number races to a more realistic focus on proving that fault-tolerant quantum computing is possible and scalable. However, the quantum industry is not an island, and its relationships with various other industries will be a focus of this talk. Leveraging our experience as an independent market research firm covering a wide range of emerging technologies, this presentation is based on perspectives from a range of fields both inside and outside the quantum bubble. We will use these to reflect on the challenges and opportunities that quantum computing faces in the years ahead, such as: · What will be the business model for quantum computers going forward, and how compatible is it for data centers? · Which industries are enabling the development of quantum computing, and how are advances in materials and manufacturing key to success? · Which industries are the most important customers for quantum computing, and what is the market outlook?

Rising AI power demand is tightening constraints on data center and AI factory infrastructure, making cooling efficiency critical and increasing interest in on‑premises power generation. This work develops a system‑level framework to evaluate the interaction between on‑prem power generation and cooling infrastructure in large‑scale AI factories, focusing on thermally driven cooling via heat recovery and absorption chillers. The framework assesses absorption chiller performance and integration readiness with on‑prem technologies such as gas turbines and fuel cells in a combined heat and power (CHP) design, mapping chiller operating envelopes to available waste‑heat characteristics and defining a data center level effectiveness metric to compare alternative CHP‑enabled cooling configurations.

AI workloads are driving new requirements for multi-level security, network performance, processor performance, and technical operations excellence.  Why is this focus on density so critically important to these systems?  And how is that directly impacting the design of foundations, flooring, rack infrastructure, and cluster overstructure? As we see the weight of each rack increase, the elevation of the racks growing taller, the width of the racks widening, the customer is gaining incredible new operational and financial benefits from this density but at what cost?  We will review the industry drivers, the new pace of AI shipments, and suggest some of the likely changes necessary to thrive in this new AI DC market. The session is intended for architects, operators, engineers, and system builders seeking practical insights for designing new open, production-ready AI clusters.