Microsoft On-Site Interviews

01 Thank You!

I wanted to personally thank Pierre Laroche, Ken Nelson, Sergio Wong, and Kiranbir Sodhia for interviewing with me this past Monday, March 22nd.

I did some follow up research and looked through my notes and wanted to report back some feedback on the content I found.

I wanted to share with you some additional information, which I've provided below.

02 Relevant Coursework

WPI's Electrical Engineering Flow Chart is shown below. On the right-hand side, you can see the Computer Engineering courses. I've linked each one of the courses to the WPI Course Description.

The most relevant courses to all of the interview questions were the following:

• ECE 2010 - Introduction to Electrical and Computer Engineering
• ECE 2029 - Introduction to Digital Circuit Design
• ECE 2049 - Embedded Computing in Engineering Design
• ECE 3829 - Advanced Digital System Design with FPGA's
• ECE 3849 - Real-Time Embedded Systems
• ECE 4801 - Computer Organization and Design

Other classes that may or may not be useful towards the HoloLens Group:

• ECE 2019 - Sensors, Circuits, and Systems
• ECE 2305 - Introduction to Communications and Networks
• ECE 2201 - Microelectronic Circuits I
• ECE 3204 - Microelectronic Circuits II
• ECE 3012 - Electrical and Computer Engineering Controls
• ECE 3308 - Introduction to Wireless Networks
• ECE 3500 - Introduction to Contemporary Power Systems
• ECE 4802 - Cryptography and Information Security

Below is my 4-Year Course Progression:

• Orange: Credit Received from High School
• Green: Credit Passed at WPI
• Red: Class Failed at WPI - But Retaken for Credit
• Grey: Equivalent Credit Issued for Coursework in addition to Project Work

This should show my Math Background (7 Courses), Physics Background (2 Courses), Electrical (13 Courses), Robotics (5 Courses), Computer Science (5 Courses), etc.

03 Interview with Pierre Laroche

Thank you very much for interviewing with me, Pierre. It was nice to meet a hardware engineer who has worked with similar Xilinx / Spartan boards as I have. I wanted to thank you for giving me some flexibility in the interview. I took these courses in October of 2013, and August of 2014 without any notice of what to study in preparation for the interview. I'm still very comfortable with bitwise operators, and simple digital logic gates, and designing hardware on the computer, it has just been a while since I was doing Lab Design work on an FPGA. I mentioned some of the topics I've covered in the past, and I still remember most of the topics at least as a surface level, but for more in-depth I would have to research a little deeper.

Here is the course website for the Advanced Systems and FPGA's Course I took at WPI:

Click Here for Course Website

Some of the topics we covered in that course included: Verilog, Synthesis, Combinational and Sequential Logic, Test Fixtures, Memory Interfacing, Modeling, Metastability, Clock Domains, Pipelines, Embedded Processors, and Simulation.

Throughout the Lab Instruction of the class, some of the tasks we were challenged with included:

• Lab 1: Xilinx Vivado Design Suite Tools, Decoder Tutorial in Verilog and Lower Level Instantiation
• Lab 2: Design Interfaces to Peripheral Devices to Drive VGA Display using SPI Interface
• Lab 3: DAC Waveform Generation and Moving Block
• Lab 4: Designing an embedded MicroBlaze MCS with VGA Display on the board

It was a pleasure meeting you and hearing about your work and projects with HoloLens. I hope I have the opportunity to meet with you, or work with you some day in the future.

04 Software Questions - Sergio Wong

Thank you Sergio for interviewing me. I enjoyed the brain teaser questions and the real-life application problems we discussed. I also wanted to thank you for giving me flexibility in answering questions, as the classes in question I have not looked at in-depth since January-March of 2014. I hope some of the information below, including my class notes, syllabus and such give you a better idea for my competence and my skill level in this area. After reviewing a lot of my notes, I'm becoming much more comfortable with the material again, and much more confident in some of these example problems.

We were discussing the refresh rate on the sensors on the Golf Cart (192k) Baud Rate, or 192,000 symbols per second. We discussed trying to find out the maximum amount of time (worst case scenario) to sample before we ran into issues of missing deadlines. When referring back to my notes, if the max(Response Time) is less than the "Relative Deadline" then the Real-Time task is "Schedulable." The Maximum Response Time is calculated by summing the max(Latency) and max(Execution Time). In a hard real-time system, the whole thing fails if it misses one single deadline, but in soft real-time systems, we can miss a few deadlines due to system tolerance. This was how we investigated whether or not a task would be schedulable.

The Operating System we used in our course was TI's SYS/BIOS RTOS and we used an embedded System-on-Chip. We used CodeComposerStudio and StellarisWare with our ARM Cortex M3 Chip.

I found a near-perfect example of the LinkedList questions that we were discussing from my course notes. The diagram below is exactly how we attempted to discuss our Roman Numeral Problem, where we have a series of Next blocks and the end points to Null. In our course, we looked at fragmentation of adding elements into fixed-size blocks, and monitoring performance of the lists (fast / deterministic, etc).

We also discussed System Architecture and how different components used common address, data, or control lines to a bridge, and how the different systems communicate with one another. After checking my notes again, we went into pretty deep detail with architecture of the SAM9G45 from Atmel, Stellaris LM3S8962 Microcontroller, MSP430 Launch Pad, and OMQP35030/25 Systems. We compared the different components and system design, along with the pros and cons of each system from a bandwidth, cache, worst-case-performance, cost, time, and power limitations. We looked into Real-Time Networks (CAN) and CPU / ARM Architecture as well (Register, ALU, Shifters, Instruction Decode, Control Level). After that course, we looked into Instruction Set Architecture such as MIPS.

When we were discussing the number of bits to a word, double, float, etc: for the MIPS Instruction Set Architecture, it used 8-bit addressing for memory. Words were 32 bits, doubles were 64 bits. For the MSP430, a 16-bit Microcontroller, the word size is only 16 bits. The size of a word changes depending on the platform. At the time of the interview, I wasn't sure what the word-size was for the Arduino at 192k baud rate, to determine maximum response time (leading to missed deadlines). After looking it up, Arduino Uno / Atmega's are 16-bit unsigned numbers, but on the Due and Zero, it's a 32-bit unsigned number.

I hope some of my explanations and information clear up any confusion from my interview. I wanted to personally thank you again for spending so much time with me, working through some of the examples so I could get my thoughts out, and providing me with the opportunity to meet with you, and members of your team. It was a pleasure meeting you and hearing about your contributions towards HoloLens development, and I'm looking forward to seeing great things come out of it.

05 Embedded Systems Questions - Ken Nelson

Thank you for interviewing me, Ken. I appreciated the help in refreshing my memory and recalling all of the relevant information from the coursework, 2 years ago. I enjoyed hearing about the type of problems you come across in applications and how you need to approach them.

We discussed a lot. The Operating System we were using was TI's SYS/BIOS RTOS. We definitely used the multitasking / multithreading, preemptive support, priority scheduler, and task synchronization (semaphores) features of the OS. We used State Machines to describe how tasks are blocked / running / ready when learning about task states, switches, and prioritization in the Vector Interrupt Table / ISR. In my course, we've also looked at hardware and software interrupts, and different latency performance of each.

In the interview, you were asking me about Linked Lists. Yes, we definitely covered those with circular FIFOs, Queues, Stacks, and how to handle this information with reentrancy / interrupts. We also looked into Non-Reentrant functions, how to fix them, and how to ensure thread safety between concurrent threads.

Semaphore definition: Controls the Blocking and Unblocking (pend and post) of tasks and are constructed with shared data (that you don't want damaged). We also looked into Binary and Counting Semaphores, which are just different applications / solutions. We mostly used Semaphores to protect critical sections, to signal, to synchronize tasks, and as building blocks for communication objects like mailboxes / message queues.

Mutex definition: A program object that is created so multiple program threads can share a common resource, including files / data. They have the same Pros and Cons of a Semaphore, but they enter and leave (as opposed to pend/post), and they're binary semaphores for mutual exclusion.

We also discussed different types of memory allocation, and copying information when entering a function, and releasing it. After sifting through my notes, we discussed the pros and cons of using malloc() and free() and looked into Fixed-Size Blocks and Fragmentation that could result from it. When we were discussing using multiple tasks, we looked into RTOS Design, and the pros and benefits of using multiple tasks.

We also discussed System Architecture and how different components used common address, data, or control lines to a bridge, and how the different systems communicate with one another. After checking my notes again, we went into pretty deep detail with architecture of the SAM9G45 from Atmel, Stellaris LM3S8962 Microcontroller, MSP430 Launch Pad, and OMQP35030/25 Systems. We compared the different components and system design, along with the pros and cons of each system from a bandwidth, cache, worst-case-performance, cost, time, and power limitations. We looked into Real-Time Networks (CAN) and CPU / ARM Architecture (Register, ALU, Shifters, Instruction Decode, Control Level) as well. After that course, we looked into Instruction Set Architecture such as MIPS.

Lastly, I wanted to thank you very much for interviewing me, and giving me the opportunity to see what your group does at Microsoft. I hope I can be part of a team of motivated individuals like yourself and your colleagues.

06 Interview with Kiranbir Sodhia

Hello Kiranbir, I'm glad I had the opportunity to meet you at such a fortunate time, on a trip from the Silicon Valley office. I know we did not have too much time to talk, but I believe any questions that you asked me that I could not answer, I discussed in Sergio's and Ken's segment. I enjoyed hearing about your position and what segments of HoloLens you govern as a Director of Software Engineering. Thank you again for working with me, as I was trying to recall information from 2 years ago.

Regarding technical questions from the interviews, I believe above I addressed the following: Queues, Stacks, Linked Lists, Recursion, some Hardware Information, Pointers, Addresses, References, Pipeline Design, Cache Design, Tasks, Multithreading, Semaphores / Mutexes, Shared Data Issues / Data Collisions, Resource Sharing, Deadlines, ARM Assembly, Architecture, MIPS, NVIC, ISRs, Prioritization, Reentrancy, Branch / Jump Commands, DRAM / SRAM, etc.

Lastly, I wanted to thank you very much for interviewing with me, and telling me about quality of life at Microsoft, group sizes, sharing work, typical days, and such. I hope I can also be a part of such a motivated group of engineers developing future technology. I'm eager to see consumers try it and be amazed at technology such as augmented reality. That type of response really keeps me motivated alongside with my passion for learning, growth, and development.